Verilognetlistnet freeware
Verilognetlistnet
Added: May 13, 2010 | Visits: 852
Verilog::Netlist::Net is a Net for a Verilog Module. SYNOPSIS use Verilog::Netlist; ... my $net = $module->find_net (signalname); print $net->name; Verilog::Netlist creates a net for every sc_signal declaration in the current module..
Platforms: *nix
License: Freeware | Size: 122.88 KB | Download (119): Verilog::Netlist::Net Download |