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Phase Locked Loop tutorial 1.0

  Date Added: July 10, 2013  |  Visits: 199

Phase Locked Loop tutorial

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This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both ANSI C or synthesizable HDL).The step-wise elaboration of the model illustrates how SimulinkdlT« forms the basis a model-based design where continuous verification of the model reduces errors.

Requirements: No special requirements
Platforms: Matlab
Keyword: Analog Basis Conceptual Continuous Design Errors Forms Generation Hdlthe Illustrates Model Modelbased Phaselocked Point Reduces Simulink Stepwise Synthesizable Verification
Users rating: 0/10

License: Freeware Size: 399.36 KB
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