Verilog Hdl

Gorgeous Karnaugh software: 1) Removes slow, tedious and error prone pen and paper from your life; 2) Gives you a pretty good logic simplification tool; 3) Supports definition of logic function using truth table, from analytic form or by direct editing karnaugh maps; 4) Supports "Dont Care"...

Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.


Platforms: Windows, Mac, Linux

Software and HDL code for Elphel reconfigurable network cameras


Platforms: Windows, Mac, Linux

vIDE is a cross-platform tool for writing and simulating Verilog models. It provides user friendly project management and file editing, integrated simulation engine, waveform viewer, pre-compiled modules, and many other cool features.


Platforms: Windows, Mac, Linux

A brand-new powerful major mode for editing verilog sources in Emacs.


Platforms: Windows, Mac, Linux

A Firefox add-on that enables the browser to access handle URIs The CNRI Handle Extension for Firefox shows you how you can open handle URIs like hdl:4263537/4000 or doi:10.1000/1 by using the native Handle System protocol. The CNRI Handle Extension for Firefox extension will even replace the...


Platforms: Mac

MB Free Cholesterol Risk Calculator is a simple health software with an easy to use interface. The program is designed to calculate the risk of a person suffering from a heart attack in the next ten years depending on cholesterol levels and their effects. Blood Cholesterol level is one of major...


Platforms: Windows

Knoppix Elphel is a Live CD based in Knoppix 4.0.2. This release includes new AJAX GUI (camvc) with DVR capability in addition to the earlier developed software. Archive (LiveCD-1.5.0.build.tar) include all files, needed for build live CD/DVD manually, except original CD/DVD images. Please...


Platforms: *nix

EP3 Perl module is the Extensible Perl PreProcessor. SYNOPSIS # Use options and files from command-line use Text::EP3; [use Text::EP3::{Extension}] # Language Specific Modules # create the PreProcessor object my $preprocessor = new Text::EP3 file; # do the preprocessing, using...


Platforms: *nix

asfpga is an assembler written for use in FPGA design. It can be easily modified for your instruction set. The ultimate goal of this software is to allow a FPGA designer to easily write assembly code for a custom instruction set. The current version allows to create a listing file, a memory...


Platforms: *nix

SystemC::SystemPerl is a SystemPerl Language Extension to SystemC. SystemPerl is a version of the SystemC language. It is designed to expand text so that needless repetition in the language is minimized. By using sp_preproc, SystemPerl files can be expanded into C++ files at compile time, or...


Platforms: *nix

SystemC::Netlist::Net is a Perl module which provides Net for a SystemC Module. This is a superclass of Verilog::Netlist::Net, derived for a SystemC netlist pin. Parsing example: @example package Trialparser; @@ISA = qw(SystemC::Parser); sub module @{ my $self = shift; my $module =...


Platforms: *nix

Qucs is a circuit simulator with graphical user interface. The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter, Harmonic Balance analysis, noise analysis, etc. Until now there is no or little user documentation available. The Qucs application has an...


Platforms: Windows, Mac, Linux

Robei is the world smallest EDA tool for FPGA design and simulation. With this tool, you can design your hardware visually at anywhere, and view the simulation result through waveform. It is a tiny, fast software for hardware prototyping and verification. Imagine that when you are waiting for a...


Platforms: Windows

HeaderAdder allows to add a header to a source file. Name, description, date etc., will be added in form of a comment at the beginning of the file. Custom or OSI licences can also be added. This script provides multiple languages support (C, PHP, VHDL …). HeaderAdder is written in PHP. It is...


Platforms: Windows, Mac, *nix, PHP, BSD Solaris

This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both ANSI C or synthesizable HDL).The step-wise...


Platforms: Matlab

Verifying and validating embedded systems comprising software and electronics is a daunting challenge, given the increasing complexity of these systems and the need to meet tight schedules. Aerospace, automotive, communications, mechatronics, and other organizations solve this challenge by...


Platforms: Matlab

Includes webinar slides as a PDF file together with a MATLAB script and a Simulink model to demonstrate filter design, implementation and HDL code generation capabilities with MATLAB, Simulink and featured toolboxes


Platforms: Matlab

This project deals with the translation of a Simulink models to SpecC specificationmodels. Matlab is one of the leading softwares in model based and algorithmic designing. SpecC (close to ANSI C) is a high level language which can be implemented on hardware usingSystem on Chip Environment(SCE)....


Platforms: Matlab