Testbench

VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches. Platforms: *nix, Perl, BSD Solaris

VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches. Platforms: *nix

Application defines templates of VHDL structures, which allows us comfortly generate most used VHDL structures. It can also work with VHDL testbench templates from which can be created VHDL testbenches of existing projects. Platforms: Windows, Mac, Linux

1> Log MAP decoder for RSC and NSC convolutional codes2> Based on Lalit Bahl's original BCJR algorithm and its logarithmic version (Hanzo & Woodard).3> Test-bench code is also included.4> *** PLEASE SUBMIT A RATING ***. Email me with any Qs Platforms: Matlab